New Interconnect IP Supports Machine Learning in Autonomous Cars

New Interconnect IP Supports Machine Learning in Autonomous Cars

A new chip interconnect technology offers promise for autonomous car manufacturers who want to employ machine learning in their vehicles. Ncore 3 Cache Coherent Interconnect IP enables chip designers to create system-on-chip (SoC) devices that mix central processors (CPUs), graphics processors (GPUs), digital signal processors (DSPs), and hardware accelerators, all of which are being increasingly employed in self-driving vehicles.

A new chip interconnect technology offers promise for autonomous car manufacturers who want to employ machine learning in their vehicles. Ncore 3 Cache Coherent Interconnect IP enables chip designers to create system-on-chip (SoC) devices that mix central processors (CPUs), graphics processors (GPUs), digital signal processors (DSPs), and hardware accelerators, all of which are being increasingly employed in self-driving vehicles.